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Computer AwarenessMedium

Cache memory is placed between which two units of a computer?

  1. A.The CPU and the main memory
  2. B.The main memory and the hard disk
  3. C.The keyboard and the CPU
  4. D.The CPU and the printer

Correct answer

A. The CPU and the main memory

Explanation

The correct answer is A, the CPU and the main memory. Cache is a small block of static RAM that keeps the instructions and data most recently used by the processor. Because it answers in a fraction of the time DRAM takes, it hides the gap between a fast processor and slower main memory; a request satisfied from it is a cache hit and one that is not is a cache miss.

Option B describes a disk buffer or disk cache, a different arrangement and not what the term cache memory means in this chapter. Option C is wrong because input from a keyboard is handled by a controller and a small buffer, not by the CPU cache. Option D is wrong for the same reason on the output side, where a printer has its own buffer and the operating system uses spooling. Remember the levels as well: L1 lies inside each core, L2 next, and a larger L3 is shared between cores.

Read the full article: Memory and Storage: RAM, ROM, Cache and Units

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Q2.Computer AwarenessEasy

How many bits make one nibble?

  1. A.2 bits
  2. B.4 bits
  3. C.8 bits
  4. D.16 bits
Show answer
Correct answer: B. 4 bits

A nibble is half a byte, that is four binary digits, and it matters because one nibble is written as exactly one hexadecimal digit, from 0 to F. That is why memory addresses in hexadecimal are read four bits at a time.

Q4.Computer AwarenessMedium

The contents of an EPROM chip are erased by exposing it to

  1. A.An electrical signal
  2. B.Ultraviolet light
  3. C.A magnetic field
  4. D.Infrared radiation
Show answer
Correct answer: B. Ultraviolet light

An Erasable Programmable Read Only Memory chip carries a small quartz window over the silicon; ultraviolet light shone through that window releases the trapped charge from every cell at once and returns the chip to its blank state, after which it can be programmed again.